1. Field Of The Invention
The present invention relates to semiconductor memory. More particularly, the present invention relates to electrically erasable programmable read only memory (EEPROM) memory, and specifically a high endurance EEPROM cell for use in EEPROM arrays.
2. The Prior Art
Floating gate EEPROM memory devices are well-known. Arrays of such memory cells have been commercially available for some time. One problem, common to all semiconductor devices, and to such memory devices in particular, is that of reliability. A particularly important parameter in EEPROM arrays is endurance, that is the number of times an EEPROM cell may be programmed and erased, before the cell fails. In most cases, an EEPROM array device is useless after the failure of one cell, unless the system into which it is installed is capable of dynamically reconfiguring around the failed cell. Numerous solutions have been proposed for the situation where an EEPROM memory cell, initially functioning, later becomes inoperative. Such schemes include error-correcting codes, redundancy and voting logic, differential sensing, and other similar schemes.
One such prior art scheme uses two floating gate memory cell transistors and associated select transistors per cell, resulting in a four transistor cell. The two outputs of the cell are connected to a NOR gate. Thus, if one of the floating gate memory transistors in the cell fails from a faulty tunnel dielectric (and thus tends to turn on the leaky transistor), the sensing circuitry will ignore that fact. This structure is disclosed in Cioaca et al., A Million Cycle CMOS 256K EEPROM, ISSCC' 87 Digest of Technical Papers, p. 79. This scheme is used in the EEPROM products designated 2816, 2864, 28C64, 52B33, and 28C256, made by SEEQ Technology, Inc., the assignee of the present invention.
The problem of reliability and the various solutions heretofore proposed often present a dichotomy. The current trend towards increased density of memory devices has increased the demand for smaller die size, hence smaller cell size, in order to increase yield. However, the solutions presented to overcome reliability problems often conflict with this aforementioned goal, since cell size or die area is often increased in order to accommodate such solutions. Hence, there is a need for an EEPROM cell structure which is small in size yet provides adequate reliability.